In a PLC system, information is conveyed over conventional power line media on PLC data carrier signals. The PLC system includes PLC transceivers that operate in accordance with predetermined PLC protocols and standards. The protocols and standards are formulated in view of the processing capabilities of the PLC transceiver equipment and the expected PLC signal transmission characteristics of the PLC system. The protocols and standards, for example, define the spectrum of frequencies used for PLC signal transmissions and how information content and associated control data are carried on PLC signals. The arrangement of information content and overhead data within a PLC signal is typically referred to as a frame structure. The frame structure establishes the sequence that PLC signals containing overhead and information content data are generated for transmission over the PLC system.
When many of the prior art PLC systems, such as orthogonal frequency division multiplexing (“OFDM”) PLC systems, were designed, the lack or limited availability of high speed processing technology dictated the characteristics of the PLC signal frame structure. The current and widely used PLC signal frame structure, which is substantially the same as the frame structure adopted in early prior art PLC systems, includes a payload portion interposed between start and end delimiters. See Gardner, S. et al., “HomePlug Standard Bring Networking to the Home”http://www.commsdesign.com/main/2001/12/0012feat5.htm, Dec. 12, 2000, incorporated by reference herein. The start and end delimiters include communications overhead data, such as a preamble, destination address, source address, network protocol type and frame check (error correction), which a destination PLC transceiver requires for extracting information content and other control data from the PLC signals transmitted by a source PLC transceiver. The payload portion contains a plurality of payload symbols. Each of the payload symbols represents one or more information content data modulated PLC carriers which are to be generated at and transmitted from the PLC transceiver.
Based on the prior art PLC system design, each of the payload symbols has a fixed, predetermined length determined by the fixed, predetermined length of the payload portion and a portion of the fixed length of each of the payload symbols is allocated to a cyclic prefix. See Gardner. The cyclic prefix is essentially a replication of the last few microseconds of the payload symbol. As well known in the art, the cyclic prefix length is included in the payload symbol to avoid the adverse effects of intersymbol interference, which may occur because network segments in the PLC system can cause different PLC carriers to experience different respective transmission delays. If the cyclic prefix is not included in a payload symbol, some of the data samples obtained when converting the received time domain PLC carrier waveforms generated for a subject payload symbol to frequency domain data could represent energy associated with PLC carriers generated for a payload symbol that precedes or follows the subject payload symbol in a frame structure. Thus, in PLC system design, the length of the cyclic prefix in a payload symbol usually is set equal to the expected worst case delay variation across the PLC frequency spectrum for the PLC system. This cyclic prefix length ensures that conversion of the PLC carrier waveform into frequency domain data begins at the portion of the PLC carrier waveform following the end of the cyclic prefix, thereby providing that the frequency domain data obtained based on the received PLC carrier waveforms generated for the subject payload symbol is not degraded by any of the PLC carriers generated for the payload symbols preceding or following the subject payload symbol.
It is further noted that the prior art fixed length payload symbol requirement provides that, for each payload symbol, time domain PLC signals having only predetermined carrier frequencies can be generated. The predetermined carrier frequencies for the PLC signals are within a predetermined PLC frequency spectrum and, in addition, only selected modulation methods can be applied for modulating data onto the PLC carrier signals. See, for example, U.S. Pat. No. 6,523,256, incorporated by reference, for a description of modulation methods that can be used in connection with PLC carriers generated for payload symbols. Also according to the prior art PLC system design, a single modulation method must be used in connection with each of the PLC carriers generated for a payload symbol. As is well known in the art, the modulation method, which establishes predetermined orders of modulation that can be used to modulate PLC carriers, determines the amount of data that a PLC carrier can carry.
Although the prior art PLC signal frame structure design limits the maximum available data throughput rate in a PLC system, this result was tolerated or required in view of the limitations of the data and signal processing technologies available in the prior art and to ensure reliable and accurate transfer of information content using PLC signals.
Since the development of the prior art PLC frame structure design, which continues to be used in a vast majority of current PLC systems, advanced, higher speed signal and data processing technologies have become available and cost effective for use in PLC transceiver equipment. PLC systems and PLC equipment, however, continue to utilize the prior art PLC signal frame structure design, which in many circumstances unnecessarily limits the maximum available data throughput rate for the PLC system.
Therefore, a need exists for a system and method for maximizing data throughput rate in a PLC system in view of available higher speed data processing technologies and while also permitting that existing PLC transceiver equipment can continue to be used without difficult or costly modifications.